A quadrature hybrid circuit is now in widespread use as a power divider/combiner for dividing/combining high-frequency signals in the radio frequency band (J. Reed and G. J. Wheeler, “A Method of Analysis of Symmetrical Four-Port Networks,” IRE Trans. Microwave Theory Tech., vol. MTT-4, pp. 246–253, 1956). FIG. 25 shows a branch-line hybrid circuit that is an example of the conventional quadrature hybrid circuit. Reference characters P1 to P4 denote I/O ports (hereinafter also referred to simply as ports). A transmission line 11, which is a two-port circuit between the ports P1 and P2, has a characteristic impedance Z=(Z0/√{square root over (2)}) and an approximately quarter-wave electrical length θ(θ=λ0/4) at a predetermined frequency f0 (wavelength λ0). Similarly, a transmission line 12, which is a two-port circuit between the ports P4 and P3, has a characteristic impedance Z=(Z0/√{square root over (2)}) and an approximately quarter-wave electrical length θ(θ=λ0/4) at the frequency f0 (wavelength λ0). A transmission line 21, which is a two-port circuit between the ports P1 and P4, has a characteristic impedance Z=Z0 and an approximately quarter-wave electrical length θ(θ=λ0/4) at the frequency f0 (wavelength λ0). Similarly, a transmission line 22, which is a two-port circuit between the ports P2 and P3, has a characteristic impedance Z=Z0 and an approximately quarter-wave electrical length θ(θ=λ0/4) at the frequency f0 (wavelength λ0).
With such a circuit arrangement as described above, a quadrature hybrid circuit is formed which operates with a coupling of 3 dB for high-frequency signals in the vicinity of the frequency f0. Where a matched load (an impedance Z0) is connected to each of the ports P2, P3 and P4 of the quadrature hybrid circuit, the power of a high-frequency signal fed via the port P1 under the matched condition divides evenly between the ports P2 and P3 and none is provided to the port P4. In this case, the high-frequency signals provided to the ports P2 and P3 are phased 90° apart. Thus the quadrature hybrid circuit can be used as a power divider for high-frequency signals.
The coupling of the quadrature hybrid circuit depends on the characteristic impedance Z of the above-mentioned quarter-wave transmission line. For the sake of brevity, the characteristic impedance Z is expressed below by admittance Y (where Y=1/Z). Letting the characteristic admittances of the transmission lines 11 and 12 be represented by Y1 and the characteristic admittances of the transmission lines 21 and 22 by Y2, the coupling, C[dB], of the quadrature hybrid circuit isC=20×log(Y1/Y2)  (i)To match input and output terminals, letting the admittance of the load be represented by Y0=1/Z0, it is necessary thatY02=Y12−Y22  (ii)that is,Y1=(Y0×Y0+Y2×Y2)1/2  (iii)Accordingly, where a matched load is connected to each of the I/O ports P2, P3 and P4, the power of the high-frequency signal input via the I/O port P1 under the matched condition is provided to the I/O port P3 at a value reduced by C[dB] and the remaining power is fed to the I/O port P2. With the coupling set at 3 dB, Y1=√{square root over (2)}×Y0 and Y2=Y0; in terms of characteristic impedance, Z1=1/Y1=(Z0/√{square root over (2)}) and Z2=1/Y2=Z0, which are the characterististic impedances of respective transmission lines of the 3 dB quadrature hybrid circuit.
The quadrature hybrid circuit has two planes of symmetry, with respect to which the I/O ports P1, P2, P3 and P4 are symmetrical to each other. These planes of symmetry are denoted by 5 and 6 in FIG. 25. The planes of symmetry 5 and 6 are normal to the plane of the paper. By virtue of this symmetry, the power of a high-frequency signal input via the I/O port P2 to the above-mentioned 3 dB quadrature hybrid circuit under the matched condition divides equally but 90° out of phase between the I/O ports P1 and P4, and no power is provided to the I/O port P3. The power of a high-frequency signal input via the I/O port P3 under the matched condition divided equally but 90° out of phase between the I/O ports P4 and P1, and no power is fed to the I/O port P2. Similarly, the power of a high-frequency signal input via the I/O port P4 under the matched condition divided equally but 90° out of phase between the I/O ports P3 and P2, and no power is fed to the I/O port P1.
It can be seen from the above that the quadrature hybrid circuit is a reversible circuit because of its characteristics mentioned above. That is, the high-frequency signal fed via the I/O port P1 into the 3 dB hybrid circuit is provided to the I/O ports P2 and P3 and no signal is output to the I/O port P4, whereas when high-frequency signals of the frequency f0 and of the same power but phased 90° apart are simultaneously input via the I/O ports P2 and P3, they are combined together and provided to the I/O port P1 and no output is provided to the I/O port P4, either. Accordingly, the quadrature hybrid circuit can be used for power combination of high-frequency signals. By inverting the phase difference between the input signals to the I/O ports P2 and P3 from 90° to −90°, the I/O port to which the output signal is provided can also be changed from P1 to P4.
With a view to miniaturizing power dividers and power combiners, there is also used a lumped branch-line hybrid circuit that employs, as a substitute for the quarter-wave transmission line used in the branch-line hybrid circuit, a π-circuit composed of an inductor and a capacitor that are lumped elements and equivalent to the quarter wave transmission line at at least a desired frequency (I. D. Robertson ed., “MMIC DESIGN,” p. 84–85, IEE, London, 1995). By determining the characteristic admittances Y1 and Y2 such that the desired coupling may be obtained with Eqs. (i) and (ii) and by selecting the value of each circuit element such that the circuit formed by lumped elements may become equivalent to the quarter-wave line of the characteristic admittance Y1 or Y2 at the desired frequency f0, it is possible to implement a lumped quadrature hybrid circuit of a desired coupling.
FIG. 26 depicts an example of such a hybrid circuit, in which two-port circuits 31 and 32 are connected between the ports P1 and P2 and between the ports P3 and P4, respectively, and two-port circuits 33 and 34 are connected between the ports P1 and P4 and between the ports P2 and P3, respectively. The two-port circuits 31 to 34 are each formed by a π-circuit composed of an inductor connected between the two ports and capacitors connected to between one and the other ends of the inductor and the ground, respectively. More specifically, by setting the inductances of inductors 101 and 104 forming the two-port circuits 31 and 32 at (Z0/√{square root over (2)})/2πf0 and the capacitances of capacitors 102, 103, 105 and 106 at 1/(2πf0×(Z0/√{square root over (2)})), the characteristic impedance Z1 of each of the two-port circuits 31 and 32 each formed by the π-circuit is Z0/√{square root over (2)} and its electrical length θ becomes equivalent to an approximately quarter-wave (where θ=λ0/4) transmission line at the frequency f0.
Similarly, by setting the inductances of the inductors 107 and 110 at Z0/2πf0 and the capacitances of capacitors 108, 109, 111 and 112 at 1/(2πf0×Z0), the characteristic impedance Z2 of each of the two-port circuits 33 and 34 is Z0 and its electrical length θ becomes equivalent to the approximately quarter-wave (where θ=λ0/4) transmission line at the frequency f0. Accordingly, a 3 dB quadrature hybrid circuit that uses, as a substitute for each quarter-wave line, the π-circuit that exhibits characteristics equivalent to those of the quarter-wave line at the desired frequency f0 can be formed by lumped elements as shown in FIG. 26.
There is also proposed a quasi-lumped branch-line hybrid circuit of the type that uses, as a substitute for the quarter-wave transmission line, a π-circuit similarly formed by a combination of a transmission line and a lumped element (T. Hirota, et al., “Reduced-Size Branch-Line and Rat-Race Hybrids for Uniplanar MMIC's,” IEEE Trans. Microwave Theory and Tech., vol. MTT-38, pp. 270–275, 1990).
The above-described power divider and power combiner are used, for example, in a parallel operation power amplifier composed of two power amplifiers. This power amplifier may sometimes be controlled to stop power supply to one of the two amplifiers to temporarily withhold parallel operation for the purpose of reducing power consumption when the output power is expected to be low. A prior art example of such a parallel operation amplifier will be described below with reference to FIG. 27. Reference numerals 41 and 42 denote power amplifiers, which constitute the parallel operation power amplifier. Reference numerals 43 and 44 denote transmission lines, and 45 and 46 denote conventional quadrature hybrid circuits.
P1 to P4 of each of the quadrature hybrid circuits 45 and 46 indicate port numbers, which correspond to the I/O ports P1 to P4 in FIG. 25, respectively. Reference numerals 47, 48, 49 and 50 denote SPDT (Single Pole Double-Throw) switches; 51 and 52 denote matching resistors (resistance Z0); 63 denotes a signal input terminal; and 64 denotes a signal output terminal. The power amplifiers 41 and 42 are equivalent in their characteristics, and the quadrature hybrid circuits 45 and 46 have their coupling set at 3 dB. With the two SPDT switches and one transmission line added to the conventional quadrature hybrid circuit, there are formed, as indicated by the broken lines 61 and 62, first and second switching parts for ON/OFF control of the power dividing or combining operation of the parallel operation power amplifier.
With the power amplifiers 41 and 42 held ON and the SPDT switches 47 to 50 connected to the ports of the quadrature hybrid circuits 45 and 46 as depicted in FIG. 27, a high-frequency signal of frequency f0 fed via the signal input terminal 63 is divided by the first quadrature hybrid circuit 45 into two, which are amplified by the power amplifiers 41 and 42 and combined together by the second quadrature hybrid circuit 46, thereafter being output via the signal output terminal 64.
On the other hand, when the power amplifier 41 is held ON and the SPDT switches 47 to 50 are connected to the transmission lines 43 and 44, the high-frequency signal of frequency f0 input via the signal input terminal 63 passes through the transmission line 43 and is applied only to and amplified by the power amplifier 41, thereafter being provided via the transmission line 44 to the signal output terminal 64. By cutting off the power supply to the power amplifier 42 in this case, its power consumption can be reduced.
In the prior art example of FIG. 27, the switching parts indicated by the broken lines 61 and 62 implement ON/OFF control of the power dividing or combining operation of the quadrature hybrid circuit by adding two SPDT switches and one transmission line to the conventional circuit structure as referred to above. For similar ON/OFF control of the power dividing or combining operation for the input to the I/O port of the quadrature hybrid circuit shown in FIG. 25, too, four SPDT switches and two transmission lines need to be added to the conventional quadrature hybrid circuit structure as depicted in FIG. 28. Accordingly, the prior art presents the disadvantage of increased circuit complexity and bulkiness when it is necessary to perform the ON/OFF control of the power dividing or combining operation. Besides, where each SPDT switch is formed by a semiconductor switch, two SPST (Single Pole Single-Throw) switches SW1 and SW2 are used which are controlled by a control unit 56 to turn ON and OFF in reverse relative to each other as shown in FIG. 29; therefore, as compared with the case of using one SPST switch that simply connects or disconnects two terminals, the number of circuit components used is large, their control is complex, and performance decreases.